This invention relates generally to integrated circuit termination devices and more particularly to integrated circuit terminating devices adapted for use with high-speed digital logic integrated circuits.
As is known in the art high-speed digital logic integrated circuits, such as emitter coupled logic (ECL) integrated circuits, are adapted to operate at relatively high speeds. These components are typically mounted on a surface of a printed circuit board assembly for electrical interconnection to other electrical components and/or other integrated circuit components which are also mounted on the same surface of the printed circuit board. As is also known in the art the inputs to an emitter coupled logic circuit generally require termination to ground through a resistor. Thus, in addition to such printed circuit board having disposed on the surface thereof the integrated circuits themselves, the terminating resistors are generally also placed on this surface of the printed circuit board. The mounting of these resistors on the same surface of the printed circuit as the integrated circuits themselves thereby reduces the amount of space available on the printed circuit board for mounting the maximum number of integrated circuits of other electrical components. Further, as is also known in the art, it is also desirable to reduce the electrical interconnect lengths between the integrated circuits and electrical components in order to maximize the relatively high speed capability of these devices. Thus, it is desirable to provide an arrangement which maximizes the availability of the printed circuit board surface for mounting integrated circuits and which additionally minimizes the electrical interconnect lengths.